Updating 003 rack system firmware initializing controllers

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The processor further comprises means for assigning the counters to selected CD-PDUs, and sensing the counters to determine whether or not segmentation of said selected CD-PDUs is within the respective service intervals.

The apparatus further comprises a channel group credit register having bits corresponding to the respective counters. Field of the Invention The present invention generally relates to the art of error detection and fault recovery in electronic data systems, and more specifically to an adaptive error error detection and correction apparatus for an Asynchronous Transfer Mode (ATM) network device. Description of the Related Art Electronic data networks are becoming increasing widespread for the communication of divergent types of data including computer coded text and graphics, voice and video.

A major problem which is inhibiting the widespread deployment of ATM is that no single ATM protocol has been developed.

A diverse assortment of ATM protocols have been developed by various manufacturers throughout the industry, some of which are so different as to be incompatible with each other.

At least, the difference between protocols prevents the various higher level capabilities of the individual protocols from being universally utilized. This occurs when a large number of users feed data into the network at the same time.

ATM cells need not be contiguous, so that computer coded data from one user can be interspersed with, for example, voice data from another user in a time divisioned manner.

The degree by which such latencies can be reduced, as well as the degree by which the size and cost of a multichip system can be reduced, are also fundamentally limited.

Ethernet is a network protocol embodying IEEE standard 802.3, which is more generically referred to as Carrier Sense with Multiple Access and Carrier Detect (CSMA/CD).

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A plurality of peak pacing rate counters reset to predetermined values upon decrementation to zero, the predetermined values corresponding to service intervals for segmentation of Conversion Sublayer Payload Data Unit (CD-PDU)s.

An adaptive error detection and correction apparatus for an Asynchronous Transfer Mode (ATM) network device comprises a sensing unit for sensing a congestion condition in the ATM network and a global pacing rate unit for adaptively reducing a maximum allowable transmission ratio of ATM cells containing information to idle ATM cells in response to a sensed congestion condition.

A processor stores a number corresponding to a relatively high maximum allowable transmission ratio in the global pacing rate register in the absence of a sensed congestion condition, and stores a number corresponding to a relatively low maximum allowable transmission ratio in the global pacing rate register in response to a sensed congestion condition.

LANs and WANs themselves can be interconnected by devices known as hubs, bridges and routers in an unlimited configuration.

Although the distinction between these interconnection devices is becoming increasingly arbitrary, they are officially classified in accordance with the layer in the Open Systems Interconnection (OSI) model in which they operate.

These transfer operations each require multiple system clock cycles which fundamentally limit the transfer speed.

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